IM31-P2-Display/DP1208/mcu_app/fml/fml_max25512.c

/*
 * fml_max25512.c
 *
 *  Created on: 2025骞<EFBFBD>4鏈<EFBFBD>10鏃<EFBFBD>
 *      Author: 22332
 */
#include <stdio.h>
#include <string.h>
#include "cola_init.h"
#include "cola_device.h"
#include "cola_os.h"
#include "bsp_register_map.h"
#include "shell.h"
#include "fml_gpio.h"
static cola_device_t *g_pDev_max25512_iic = NULL;

static bool ACK;
static bool OUT[8] = {0};
uint8_t data_receive123[1] ={0};
uint8_t data_TRANS123[1] ={0x0F};
extern void logWrite(const char *fmt, ...);


void fml_Read_Device_ID(uint8_t data_receive)
{
    uint8_t address = 1;
    cola_device_read(g_pDev_max25512_iic,address,(void *)&data_receive123,0);

}


bool fml_Write_ISET(uint8_t value)
{
	uint8_t address = ISET_REG;
	ACK =  cola_device_write(g_pDev_max25512_iic,address,&value,1);
	return ACK;
}

void fml_max25512_set_bklight_on(bool bON)
{
	fml_gpio_write(OUT_BL_EN,bON);
	cola_delay_ms(5);
	if(bON)
		fml_Write_ISET(0x02);
}

void fml_max25512_init(void)
{
    g_pDev_max25512_iic = cola_device_find("max25512_IIC");
}

/*
DEV_ID[7:0] read-only
default 0x28
*/

/*
REV_ID[3:0] read-only
default 0x02
*/
void fml_Read_Device_Verision_ID(uint8_t data_receive)
{
    uint8_t address = REV_ID_REG;
    cola_device_read(g_pDev_max25512_iic,address,(void *)&data_receive,0);

}
/*
Unassignment:[7:4]
BSTFORCE:    [3] when 1 force the boost converter and independent of the dimming signal
FAST_SS:     [2] Selects slow or fast boost soft-start. Set to 1 for fast soft-start
ENA锛<EFBFBD>        [1] Boost converter and LED outputs enable bit. Set to 1 to enable the device.
PSEN锛<EFBFBD>       [0] When 0, phase shifting is disabled. When 1, phase shifting is enabled
*/

/*
LO_DIM:       [7:4] When 1, indicates channel 4~1 is in low-dim mode.  read-only
DIM_EXT:      [3] When 1, dimming through the DIM pin is enabled. When 0, dimming is controlled using the TON registers.
HDIM:         [2] When 1, hybrid dimming is enabled. Default value is 0
HDIM_THR_1_0锛歔1锛<EFBFBD>0] Set hybrid dimming threshold 0x00:6.25%    0x01:12.5%    0x02:25%   0x03:50%
*/
void fml_read_write_imode(uint8_t data_transfer)
{   static bool LO_DIM[4] = {0};
	uint8_t data_receive[1];
    uint8_t address = IMOD_REG;
    cola_device_read(g_pDev_max25512_iic,address,data_receive,0);
    LO_DIM[0] = data_receive[0] & 0x80;
    LO_DIM[1] = data_receive[0] & 0x40;
    LO_DIM[2] = data_receive[0] & 0x20;
    LO_DIM[3] = data_receive[0] & 0x10;

       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);

}
/*
ADIM锛歔7:0] 8-bit linear analog dimming value. 0xFF is full-scale current, and each bit represents a current step of 0.4%.
*/
void fml_Write_ADIM(uint8_t data_transfer)
{

    uint8_t address = ADIM_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}


/*
TON1H锛歔7:0]High byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON1H(uint8_t data_transfer)
{

    uint8_t address = TON1H_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON1L锛歔7:0]Middle byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON1L(uint8_t data_transfer)
{

    uint8_t address = TON1L_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON2H锛歔7:0]High byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON2H(uint8_t data_transfer)
{

    uint8_t address = TON2H_REG;
    ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON2L锛歔7:0]Middle byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON2L(uint8_t data_transfer)
{

    uint8_t address = TON2L_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON3H锛歔7:0]High byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON3H(uint8_t data_transfer)
{

    uint8_t address = TON3H_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON3L锛歔7:0]Middle byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON3L(uint8_t data_transfer)
{

    uint8_t address = TON3L_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON4H锛歔7:0]High byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON4H(uint8_t data_transfer)
{

    uint8_t address = TON4H_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON4L锛歔7:0]Middle byte of 18-bit TON setting for channel 1      resolution:50ns
*/
void fml_Write_TON4L(uint8_t data_transfer)
{

    uint8_t address = TON4L_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
TON4LSB锛歔7:6] 2 least significant bits of 18-bit TON setting for channel 4      resolution:50ns
TON3LSB锛歔5:4] 2 least significant bits of 18-bit TON setting for channel 3
TON2LSB锛歔3:2] 2 least significant bits of 18-bit TON setting for channel 2
TON1LSB锛歔1:0] 2 least significant bits of 18-bit TON setting for channel 1
*/
void fml_Write_TONLSB(uint8_t data_transfer)
{
    uint8_t address = TON1_4LSB_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
Unassignment: [7]
FPWM锛<EFBFBD>        [6:4] set PWM frequancy   0x00:153  0x00:203  0x00:305  0x00:610  0x00:980 0x00:1220  0x00:1401  0x00:1634  (HZ)
SS_OFF锛<EFBFBD>      [3] When 1, spread-spectrum switching is disabled. Default value is 0.
SSL锛<EFBFBD>         [2] choose the amount of spread-spectrum, ensure change the ssl bit when SS_OFF bit is setted disable. When 0, the spread is nominally 卤6%. When 1, the spread is 卤4%
SLDET锛<EFBFBD>       [1:0] Shorted-LED-Threshold Settings  0x00:disabled    0x01:3V   0x02:6V   0x03:8V
*/
void fml_Write_setting(uint8_t data_transfer)
{
    uint8_t address = SETTING_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
Unassignment: [7锛<EFBFBD>6][4]
CP_DIS:       [5]    Setting CP_DIS to 1 during operation will cause complete shutdown of the device and is not recommended.
DIS:          [3:0]  Set bit to 1 to disable OUT4~1. This must be done before ENA is written to 1
*/
void fml_Write_disable(uint8_t data_transfer)
{
    uint8_t address = DISABLE_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
Unassignment:   [7:5]
FADE_GAIN:      [4] When this bit is set to 1, the fade-in-out function has a gain of 12.5%, otherwise 6.25%
FADE_IN_OUT:    [3] When this bit is set to 1, the fade-in-out function for the LED dimming is enabled
TDIM:           [2:0] TDIM can be between 0 and 5. When set to 0, fading is updated on every dimming cycle
                0x0:1   0x1:2   0x3:4   0x4:16   0x5:32
*/
void fml_Write_fading(uint8_t data_transfer)
{
    uint8_t address = FADING_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
Unassignment:   [7:4]
OUT_OPEN:       [3:0] If 1, an open is detected on channel 4~1      read-only
*/
void fml_read_open(void)
{
    uint8_t address = OPEN_REG;
    uint8_t data_receive[1];
    cola_device_read(g_pDev_max25512_iic,address,data_receive,0);
    OUT[0] = data_receive[0] & 0x01;
    OUT[1] = data_receive[0] & 0x02;
    OUT[2] = data_receive[0] & 0x04;
    OUT[3] = data_receive[0] & 0x08;

}
/*
Unassignment:           [7:4]
OUT_short_to_GND:       [3:0] If 1, a short-to-ground is detected on channel 4~1 at startup     read-only
*/
void fml_read_short_to_GND(void)
{
    uint8_t address = SHORTGND_REG;
    uint8_t data_receive[1];
    cola_device_read(g_pDev_max25512_iic,address,data_receive,0);
    OUT[0] = data_receive[0] & 0x01;
    OUT[1] = data_receive[0] & 0x02;
    OUT[2] = data_receive[0] & 0x04;
    OUT[3] = data_receive[0] & 0x08;
}
/*
Unassignment:           [7:4]
OUT_shorted_LED:        [3:0] If 1, a shorted-LED condition is detected on channel 4~1     read-only
*/
void fml_read_shorted_LED(void)
{
    uint8_t address = SHORT_LED_REG;
    uint8_t data_receive[1];
    cola_device_read(g_pDev_max25512_iic,address,data_receive,0);
    OUT[0] = data_receive[0] & 0x01;
    OUT[1] = data_receive[0] & 0x02;
    OUT[2] = data_receive[0] & 0x04;
    OUT[3] = data_receive[0] & 0x08;
}
/*
choose which kind of fault will not cause FLTB pin to assert low.
Unassignment:   [7:5]
BSTUVMASK:      [4] a boost undervoltage fault
OMASK:          [3] an open-LED fault
SGMASK:         [2] a short-to-ground LED fault
OTWMASK:        [1] an overtemperature warning
SLMASK:         [0] a shorted-LED fault
*/
void fml_Write_mask(uint8_t data_transfer)
{
    uint8_t address = MASK_REG;
       ACK = cola_device_write(g_pDev_max25512_iic,address,(void *)&data_transfer,0);
}
/*
Boost state, overtemperature-warning/shutdown diagnostics   read-only
Unassignment:   [6]
RTOOR:          [7] This bit is set to 1 if the resistor on the RT pin is out of the expected range. When this happens, the device cannot operate
ISETOOR:        [5] When 1, this bit indicates that the ISET current is out of range.In this condition, the IC stops operation.
BSTUV:          [4] If 1, an undervoltage is detected on the boost output, and the boost is disabled
BSTOV:          [3] If 1, the boost converter is at its overvoltage limit
HW_RST:         [2] If 1, the device has just emerged from a hardware reset (power-up). This bit is reset after the first read from this register.
OTW:            [1] If 1, the junction temperature of the device is over TWARN, or the temperature foldback circuit has reached the temperature T1.
OT:             [0] If 1, the junction temperature of the device exceeds TSHDN, and the device is shut down
*/
void fml_read_diagnose(void)
{
    uint8_t address = DIAG_REG;
    uint8_t data_receive[1];
    cola_device_read(g_pDev_max25512_iic,address,data_receive,0);
    OUT[0] = data_receive[0] & 0x01;
    OUT[1] = data_receive[0] & 0x02;
    OUT[2] = data_receive[0] & 0x04;
    OUT[3] = data_receive[0] & 0x08;
    OUT[4] = data_receive[0] & 0x10;
    OUT[5] = data_receive[0] & 0x20;
    OUT[6] = data_receive[0] & 0x40;
    OUT[7] = data_receive[0] & 0x80;
}