/* * bsp_register_map.h * * Created on: 2025骞�4鏈�9鏃� * Author: 22332 */ #ifndef BSP_REGISTER_MAP_H_ #define BSP_REGISTER_MAP_H_ #include "sdk_project_config.h" #define PMIC_Slave_Address (uint16_t)0x6B; #define PAVDD 0x00U #define NAVDD 0x01U #define VGH 0x02U #define VGL 0x03U #define VCOM_C 0x04U #define VGH_LOW_TEMP 0x05U #define SW_FREQ 0x06U #define PAVDD_ON_DELAY 0x07U #define PAVDD_SOFT_START 0x08U #define VGL_ON_DELAY 0x09U #define VGL_SOFT_START 0x0AU #define VGH_ON_DELAY 0x0BU #define VGH_SOFT_START 0x0CU #define NAVDD_ON_DELAY 0x0DU #define NAVDD_SOFT_START 0x0EU #define VCOM_ON_DELAY 0x0FU #define RESET_ON_DELAY 0x10U #define POWER_OFF_DELAY 0x11U #define OPTION1 0x12U #define OPTION2 0x13U #define OPTION3 0x14U #define CHANNEL_ON_OFF_OPTION 0x16U #define AUTO_REFRESH_OPTION 0x17U #define PAVDD_OFF_DELAY 0x18U #define NAVDD_OFF_DELAY 0x19U #define VGH_OFF_DELAY 0x1AU #define VGL_OFF_DELAY 0x1BU #define FAULT_VCOM 0x1CU #define FAULT_ANALYSIS 0x1DU #define MAX25512_Slave_Address 0x22U #define DEV_ID_REG 0x00U #define REV_ID_REG 0x01U #define ISET_REG 0x02U #define IMOD_REG 0x03U #define ADIM_REG 0x04U #define TON1H_REG 0x05U #define TON1L_REG 0x06U #define TON2H_REG 0x07U #define TON2L_REG 0x08U #define TON3H_REG 0x09U #define TON3L_REG 0x0AU #define TON4H_REG 0x0BU #define TON4L_REG 0x0CU #define TON1_4LSB_REG 0x0DU #define SETTING_REG 0x0EU #define DISABLE_REG 0x0FU #define FADING_REG 0x10U #define OPEN_REG 0x11U #define SHORTGND_REG 0x12U #define SHORT_LED_REG 0x13U #define MASK_REG 0x14U #define DIAG_REG 0x15U typedef enum{ LCD_BACKLIGHT_PWM = 0x03U, LCD_BACKLIGHT_SWITCH = 0x04U, DAY_NIGHT_MODE = 0x07U, TOUCH_RESET = 0x11U, UPDATE_WRITE = 0x23U, TIME_STAMP = 0x24U, } master_write; typedef enum{ LCD_BACKLIGHT_FB = 0x02U, DIAGNOSTIC_STATUS1 = 0x0AU, DIAGNOSTIC_STATUS2 = 0x0BU, LCD_BACKLIGHT_SWITCH_STATE = 0x05U, LCD_TEMPURATURE = 0x0FU, UPDATE_READ = 0x22U, LCD_BACKLIGHT_AMBIENT_LIGHT_SENSOR = 0x31U, I2C_CLASSIFY_VERSION0_READ = 0x40U, I2C_CLASSIFY_VERSION1_READ = 0x41U, I2C_CLASSIFY_VERSION2_READ = 0x42U, I2C_CLASSIFY_VERSION3_READ = 0x43U, I2C_CLASSIFY_FBL_VERSION0_READ = 0x44U, I2C_CLASSIFY_FBL_VERSION1_READ = 0x45U, I2C_CLASSIFY_FBL_VERSION2_READ = 0x46U, LCD_TYPE = 0x50U, TP_type = 0x51U, PN_VERSION0 = 0x60U, PN_VERSION1 = 0x61U, PN_VERSION2 = 0x62U, PN_VERSION3 = 0x63U, PN_VERSION4 = 0x64U, PN_VERSION5 = 0x65U, HARDWARE_VERSION0 = 0x70U, HARDWARE_VERSION1 = 0x71U, HARDWARE_VERSION2 = 0x72U, HARDWARE_VERSION3 = 0x73U, HARDWARE_VERSION4 = 0x74U, HARDWARE_VERSION5 = 0x75U, SOFTWARE_VERSION0 = 0x80U, SOFTWARE_VERSION1 = 0x81U, SOFTWARE_VERSION2 = 0x82U, SOFTWARE_VERSION3 = 0x83U, SOFTWARE_VERSION4 = 0x84U, SOFTWARE_VERSION5 = 0x85U, BOOTLOADER_VERSION = 0x86U, I2C_CLASSIFY_FLASH_VERSION_READ = 0x95U, DISPLAY_SELF_CHECK_INFO = 0xB0U, } master_read; typedef enum{ APP_VERSION = 0X01U, PN_VERSION = 0X02U, HARDWARE_VERSION = 0X03U, PANNL_HARDWARE = 0X04U, PANNL_SOFTWAER = 0X05U, BLACKLIGHT_EN = 0X06U, BLACKLIGHT_DUTY = 0X07U, DIAGNOSTIC_1 = 0x08U, DIAGNOSTIC_2 = 0x09U, TEMP_AD_VALUE = 0X0AU, TP_POSITION = 0X0BU, TP_TYPE = 0X0CU, DISPLAY_COLAL = 0X30U, } test; #define RM5T500A_Slave_Address 0x60U typedef enum{ EVENT_TP = 0x00, EVENT_DCLK, EVENT_HS, EVENT_LOCK, EVENT_SD, EVENT_POWER, EVENT_VDPA, } register_event; typedef enum{ TP_WDT_ERROR = 0, TP_Configuration_CRC_Error = 2, TP_Sensor_open_short_test = 4, TP_Flash_load_CRC_Error = 6, TP_Flash_data_load_CRC_Error = 15, } err_50000060; typedef enum{ DCLK_Detection_Port1 = 20, DCLK_Detection_Port2 = 21, DE_Detection = 17, Float_Detection_in_LVDS = 16, SDNOFB_Feedback_STH_Detection = 19, GDNOFB_Feedback_STV_Detection = 18, } err_50002188; typedef enum{ HS_Detection = 0, VS_Stop_Detection = 1, Data_CRC = 2, } err_5000218C; typedef enum{ LOCK_Detection_in_LVDS = 29, OEV_Stop_Detection = 30, POL_Stop_Detection = 31, GOA_ASIL_GOA_Detection_Feedback = 0, } err_5000225C; typedef enum{ EDT_PA_OVP_FLAG = 25, EDT_PA_UVP_FLAG = 26, EDT_NA_OVP_FLAG = 27, EDT_NA_UVP_FLAG = 28, EDT_VGH_OVP_FLAG = 29, EDT_VGH_UVP_FLAG = 30, EDT_VGL_OVP_FLAG = 31, EDT_VGL_UVP_FLAG = 0, EDT_VCOM_OVP_FLAG = 1, EDT_VCOM_UVP_FLAG = 2, } err_50002264; typedef enum{ STV_Detection = 4, CKV_Detection = 3, } err_50002268; typedef enum{ VDPA_VDNA_Fail_Ext = 13, VDPA_VDNA_Fail_Int = 12, EDT_VDNA_OCP_FLAG = 11, EDT_VDPA_OCP_FLAG = 10, Flash_Checksum_Detection = 24, Register_Checksum_Detection = 20, Thermal_Ultra_High_Detection = 16, XON_Detection = 8, } err_50002258; typedef enum{ PTGN_RED = 0, PTGN_WHITE, PTGN_BLACK, PTGN_CBAR_A, PTGN_BLUE, PTGN_GREEN, PTGN_FLICKER, PTGN_CROSS_B, PTGN_CROSS_A, PTGN_CHESS_B, PTGN_CHESS_A, PTGN_H_GRAY_B, PTGN_H_GRAY_A, PTGN_CBAR_B, PTGN_SPONOFF, PTGN_PONOFF, PTGN_WFRAME_B, PTGN_WFRAME_A, PTGN_GLEVEL, PTGN_RGBW, PTGN_V_GRAY_B, PTGN_V_GRAY_A, PTGN_H_BW_B, PTGN_H_BW_A, } color_pattern; typedef struct DIAGNOSE1_DATA { bool LOW_VOL_FAIL; ///< MCU鐨勫崌绾ф爣蹇� bool HIGH_VOL_FAIL; ///< 灞忓箷浜害 bool LCD_FAIL; bool BACKLIGHT_FAIL; bool LCD_TEMPERATURE_FAIL; bool LCD_NTC_FAIL; bool RESERVER1; bool RESERVER2; }ST_DIAGNOSE1_DATA; typedef struct DIAGNOSE2_DATA { bool RESERVER0; ///< MCU鐨勫崌绾ф爣蹇� bool RESERVER1; ///< 灞忓箷浜害 bool LOCK_FAIL; bool RESERVER3; bool RESERVER4; bool RESERVER5; bool RESERVER6; bool RESERVER7; }ST_DIAGNOSE2_DATA; typedef struct { void *rxbuf; int rxlength; void *txbuf; int txlength; void *fun; } ST_I2C_RX_TX; #endif /* BSP_REGISTER_MAP_H_ */