1e21cdb572
2.修改开关FCD_EN时的死机问题 3.修改快速开关FCD_EN信号时出现花屏的问题 4.修改cola_set_event事件参数,都是一个32bit的整数,每个事件占用1个bit 5.将B+高低压ADC判断改为电压mv判断 6.修改lvds lock信号消抖时间 7.修改不接lvds线时,快速开关FCD_EN不进入BIST模式的问题 8.添加A样相关资料
372 lines
8.6 KiB
C
372 lines
8.6 KiB
C
/*
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* fml_PMIC.c
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*
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* Created on: 2025年4月10日
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* Author: 22332
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*/
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#include <stdio.h>
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#include "cola_init.h"
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#include "cola_device.h"
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#include "bsp_register_map.h"
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#include "shell.h"
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#include "fml_PMIC.h"
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#include "fml_gpio.h"
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static cola_device_t *g_pDev_pmic_iic = NULL;
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static bool ACK;
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void fml_pmic_write_to_mtp(void)
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{//Enable write data
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uint8_t address = 0xFF,value = 0x80;
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cola_delay_ms(2);
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ACK = cola_device_write(g_pDev_pmic_iic,address,&value,1);
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cola_delay_ms(500);
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if(ACK == 0)
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logWrite("MTP write error\r\n");
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}
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void fml_pmic_init(void)
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{
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g_pDev_pmic_iic = cola_device_find("PMIC_IIC");
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fml_PAVDD_out_voltage(0x10);//5.8v
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cola_delay_ms(10);
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fml_NAVDD_out_voltage(0x10);//-5.8v
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cola_delay_ms(10);
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fml_VGH_out_voltage(0x06); //10v
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cola_delay_ms(10);
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fml_VGL_out_voltage(0x0C);//-9V
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fml_pmic_write_to_mtp();
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}
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uint8_t* detect_power_fault()
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{ static bool power_fault[4] = {0};
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uint8_t s_receiveBuffer[1];
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uint8_t address = FAULT_ANALYSIS;
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cola_device_read(g_pDev_pmic_iic,address,s_receiveBuffer,0);
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power_fault[0] = s_receiveBuffer[0] & 0x01;
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power_fault[1] = s_receiveBuffer[0] & 0x02;
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power_fault[2] = s_receiveBuffer[0] & 0x04;
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power_fault[3] = s_receiveBuffer[0] & 0x08;
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return (uint8_t*)power_fault;
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}
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/*
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PAVDD Output Voltage Setting
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0X00~0X2E: 5.00V~7.30V unit:0.05V
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*/
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bool fml_PAVDD_out_voltage(uint8_t data)
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{
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uint8_t address = PAVDD;
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ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
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if(ACK == 0)
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logWrite("PAVDD write error\r\n");
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return ACK;
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}
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/*
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NAVDD Output Voltage Setting
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0X00~0X2E: -5.00V~-7.30V unit:0.05V
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*/
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void fml_NAVDD_out_voltage(uint8_t data)
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{
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uint8_t address = NAVDD;
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ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
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if(ACK == 0)
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logWrite("NAVDD write error\r\n");
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}
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//0X00~0X2E: 7.00V~30.0V unit:0.5V
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void fml_VGH_out_voltage(uint8_t data)
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{
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uint8_t address = VGH;
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ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
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if(ACK == 0)
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logWrite("VGH write error\r\n");
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}
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//0X00~0X30: -6.00V~-18.0V unit:0.25V
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void fml_VGL_out_voltage(uint8_t data)
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{
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uint8_t address = VGL;
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ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
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if(ACK == 0)
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logWrite("VGL write error\r\n");
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}
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//0X00~0XFA: -3.00V~-2.00V unit:20mV
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void fml_VCOM_C_out_voltage(uint8_t data)
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{
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uint8_t address = VCOM_C;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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//0X00~0X03: 2V~8V unit:2V
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void fml_VGH_LOW_TEMP_COMPENSATION_voltage(uint8_t data)
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{
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uint8_t address = VGH_LOW_TEMP;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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//0X00：600KHZ 0x01:800KHZ 0x02:1MHZ 0x03:2.2MHZ
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void fml_switching_frequency(uint8_t data)
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{
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uint8_t address = SW_FREQ;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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PAVDD Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_PAVDD_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = PAVDD_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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PAVDD Soft-start time Setting
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0x00~0x07:5ms~40ms unit:5ms
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*/
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void fml_PAVDD_SOFT_START_time(uint8_t data)
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{
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uint8_t address = PAVDD_SOFT_START;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGL Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_VGL_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = VGL_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGL Soft-start time Setting
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0x00~0x07:3ms~24ms unit:3ms
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*/
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void fml_VGL_SOFT_START_time(uint8_t data)
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{
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uint8_t address = VGL_SOFT_START;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGH Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_VGH_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = VGH_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGH Soft-start time Setting
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0x00~0x03:5ms~20ms unit:5ms
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*/
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void fml_VGH_SOFT_START_time(uint8_t data)
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{
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uint8_t address = VGH_SOFT_START;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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NAVDD Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_NAVDD_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = NAVDD_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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NAVDD Soft-start time Setting
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0x00~0x07:5ms~40ms unit:5ms
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*/
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void fml_NAVDD_SOFT_START_time(uint8_t data)
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{
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uint8_t address = NAVDD_SOFT_START;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VCOM Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_VCOM_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = VCOM_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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RESET Power-on Delay Time Setting
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0x00~0x0F:0ms~75ms unit:5ms
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*/
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void fml_RESET_ON_DELAY_time(uint8_t data)
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{
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uint8_t address = RESET_ON_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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Power-off Delay Time Setting
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0x00~0x0F:0ms~45ms unit:3ms
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*/
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void fml_POWER_OFF_DELAY_time(uint8_t data)
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{
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uint8_t address = POWER_OFF_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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OPTION1:
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RESET goes low following power-off delay time or VGH channel turn off[7]
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0:power-off delay 1：VGH channel turn off
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The voltage detector monitors the VIN voltage to
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generate a RESET signal from RESET pin while VIN is
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lower than the detecting level
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detecting level:[6:5]
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0x00：UVLO Falling 0x01：2.1V 0x02：2.4V 0x03：2.7V
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Discharge Function：
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PAVDD Discharge Function:[4]
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NAVDD Discharge Function:[3]
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VGH Discharge Function:[2]
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VGL Discharge Function:[1]
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VCOM Discharge Function:[0]
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0：ON 1：OFF
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*/
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void fml_OPTION1_SETTING(uint8_t data)
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{
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uint8_t address = OPTION1;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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OPTION2:
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PAVDD Slew Rate Setting:[7:6]
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NAVDD Slew Rate Setting:[5:4]
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VGL Slew Rate Setting:[3:2]
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VGH Slew Rate Setting:[1:0]
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0x00:Fast 0x01:Normal 0x02:Slow 0x03:Slowest
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*/
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void fml_SLEW_RATE_SETTING(uint8_t data)
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{
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uint8_t address = OPTION2;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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OPTION3:
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VGL Internal/External Option[5]
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0：internal 1:external
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frequency spread：[4:3]
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0x00：off 0x01:3% 0x02:6%
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Over Temperature Protection (OTP):[2]
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Under Voltage Protection (UVP)：[1]
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Short Circuit Protection (SCP):[0]
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0:ON 1:OFF
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*/
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void fml_OPTION3_SETTING(uint8_t data)
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{
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uint8_t address = OPTION3;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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Channel ON/OFF Option:
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RESET EN:[5]
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VCOM EN:[5]
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NAVDD EN:[5]
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VGH EN:[5]
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VGL EN:[5]
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PAVDD EN:[5]
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0：OFF 1: ON
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*/
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void fml_Channel_on_off_SETTING(uint8_t data)
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{
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uint8_t address = CHANNEL_ON_OFF_OPTION;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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Auto Refresh Functions：
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registers code auto recovery function if the registers code is changed abnormally
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Auto Refresh Enable:[0]
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0:off 1:on
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Refreshing Time:[2:1]
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0x00:0.25s 0x01:0.5s 0x02:0.75s 0x03:1s
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FAULT Behavior:[3]
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0：Fault pin not output low 1：Fault pin output low
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*/
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void fml_Auto_Refresh_SETTING(uint8_t data)
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{
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uint8_t address = AUTO_REFRESH_OPTION;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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PAVDD Off Delay Time[2:0]
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0x00~0x07:0ms~14ms unit:2ms
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*/
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void fml_PAVDD_off_Delay_Time(uint8_t data)
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{
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uint8_t address = PAVDD_OFF_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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NAVDD Off Delay Time[2:0]
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0x00~0x07:0ms~14ms unit:2ms
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*/
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void fml_NAVDD_off_Delay_Time(uint8_t data)
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{
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uint8_t address = NAVDD_OFF_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGH Off Delay Time[2:0]
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0x00~0x07:0ms~14ms unit:2ms
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*/
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void fml_VGH_off_Delay_Time(uint8_t data)
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{
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uint8_t address = VGH_OFF_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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VGL Off Delay Time[2:0]
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0x00~0x07:0ms~14ms unit:2ms
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*/
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void fml_VGL_off_Delay_Time(uint8_t data)
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{
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uint8_t address = VGL_OFF_DELAY;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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/*
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FAULT Analysis Clear Option[3]
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0:Not Clear 1:Clear
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VCOM Off Delay Time[2:0]
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0x00~0x07:0ms~14ms unit:2ms
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*/
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void fml_FAULT_VCOM_off_Delay_Time(uint8_t data)
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{
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uint8_t address = FAULT_VCOM;
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ACK = cola_device_write(g_pDev_pmic_iic,address,0,data);
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}
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